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NXP Semiconductors /LPC408x_7x /MCPWM /CNTCON

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Interpret as CNTCON

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (A_RISING_EDGE_ON_MCI)TC0MCI0_RE 0 (A_FALLING_EDGE_ON_MC)TC0MCI0_FE 0 (A_RISING_EDGE_ON_MCI)TC0MCI1_RE 0 (A_FALLING_EDGE_ON_MC)TC0MCI1_FE 0 (A_RISING_EDGE_ON_MCI)TC0MCI2_RE 0 (A_FALLING_EDGE_ON_MC)TC0MCI2_FE 0 (A_RISING_EDGE_ON_MCI)TC1MCI0_RE 0 (A_FALLING_EDGE_ON_MC)TC1MCI0_FE 0 (A_RISING_EDGE_ON_MCI)TC1MCI1_RE 0 (A_FALLING_EDGE_ON_MC)TC1MCI1_FE 0 (A_RISING_EDGE_ON_MCI)TC1MCI2_RE 0 (A_FALLING_EDGE_ON_MC)TC1MCI2_FE 0 (A_RISING_EDGE_ON_MCI)TC2MCI0_RE 0 (A_FALLING_EDGE_ON_MC)TC2MCI0_FE 0 (A_RISING_EDGE_ON_MCI)TC2MCI1_RE 0 (A_FALLING_EDGE_ON_MC)TC2MCI1_FE 0 (A_RISING_EDGE_ON_MCI)TC2MCI2_RE 0 (A_FALLING_EDGE_ON_MC)TC2MCI2_FE 0RESERVED0 (CHANNEL_0_IS_IN_TIME)CNTR0 0 (CHANNEL_1_IS_IN_TIME)CNTR1 0 (CHANNEL_2_IS_IN_TIME)CNTR2

TC0MCI0_RE=A_RISING_EDGE_ON_MCI, TC0MCI1_FE=A_FALLING_EDGE_ON_MC, TC2MCI1_RE=A_RISING_EDGE_ON_MCI, TC2MCI0_RE=A_RISING_EDGE_ON_MCI, TC0MCI1_RE=A_RISING_EDGE_ON_MCI, CNTR2=CHANNEL_2_IS_IN_TIME, TC1MCI2_FE=A_FALLING_EDGE_ON_MC, TC1MCI1_FE=A_FALLING_EDGE_ON_MC, TC2MCI2_RE=A_RISING_EDGE_ON_MCI, CNTR0=CHANNEL_0_IS_IN_TIME, TC1MCI2_RE=A_RISING_EDGE_ON_MCI, TC2MCI2_FE=A_FALLING_EDGE_ON_MC, TC2MCI1_FE=A_FALLING_EDGE_ON_MC, TC2MCI0_FE=A_FALLING_EDGE_ON_MC, TC0MCI2_RE=A_RISING_EDGE_ON_MCI, TC0MCI2_FE=A_FALLING_EDGE_ON_MC, TC1MCI0_FE=A_FALLING_EDGE_ON_MC, CNTR1=CHANNEL_1_IS_IN_TIME, TC1MCI1_RE=A_RISING_EDGE_ON_MCI, TC1MCI0_RE=A_RISING_EDGE_ON_MCI, TC0MCI0_FE=A_FALLING_EDGE_ON_MC

Description

Count Control read address

Fields

TC0MCI0_RE

Counter 0 rising edge mode, channel 0.

0 (A_RISING_EDGE_ON_MCI): A rising edge on MCI0 does not affect counter 0.

1 (RISING): If MODE0 is 1, counter 0 advances on a rising edge on MCI0.
TC0MCI0_FE

Counter 0 falling edge mode, channel 0.

0 (A_FALLING_EDGE_ON_MC): A falling edge on MCI0 does not affect counter 0.

1 (FALLING): If MODE0 is 1, counter 0 advances on a falling edge on MCI0.
TC0MCI1_RE

Counter 0 rising edge mode, channel 1.

0 (A_RISING_EDGE_ON_MCI): A rising edge on MCI1 does not affect counter 0.

1 (RISING): If MODE0 is 1, counter 0 advances on a rising edge on MCI1.
TC0MCI1_FE

Counter 0 falling edge mode, channel 1.

0 (A_FALLING_EDGE_ON_MC): A falling edge on MCI1 does not affect counter 0.

1 (FALLING): If MODE0 is 1, counter 0 advances on a falling edge on MCI1.
TC0MCI2_RE

Counter 0 rising edge mode, channel 2.

0 (A_RISING_EDGE_ON_MCI): A rising edge on MCI0 does not affect counter 0.

1 (RISING): If MODE0 is 1, counter 0 advances on a rising edge on MCI2.
TC0MCI2_FE

Counter 0 falling edge mode, channel 2.

0 (A_FALLING_EDGE_ON_MC): A falling edge on MCI0 does not affect counter 0.

1 (FALLLING): If MODE0 is 1, counter 0 advances on a falling edge on MCI2.
TC1MCI0_RE

Counter 1 rising edge mode, channel 0.

0 (A_RISING_EDGE_ON_MCI): A rising edge on MCI0 does not affect counter 1.

1 (RISING): If MODE1 is 1, counter 1 advances on a rising edge on MCI0.
TC1MCI0_FE

Counter 1 falling edge mode, channel 0.

0 (A_FALLING_EDGE_ON_MC): A falling edge on MCI0 does not affect counter 1.

1 (FALLING): If MODE1 is 1, counter 1 advances on a falling edge on MCI0.
TC1MCI1_RE

Counter 1 rising edge mode, channel 1.

0 (A_RISING_EDGE_ON_MCI): A rising edge on MCI1 does not affect counter 1.

1 (RISING): If MODE1 is 1, counter 1 advances on a rising edge on MCI1.
TC1MCI1_FE

Counter 1 falling edge mode, channel 1.

0 (A_FALLING_EDGE_ON_MC): A falling edge on MCI0 does not affect counter 1.

1 (FALLING): If MODE1 is 1, counter 1 advances on a falling edge on MCI1.
TC1MCI2_RE

Counter 1 rising edge mode, channel 2.

0 (A_RISING_EDGE_ON_MCI): A rising edge on MCI2 does not affect counter 1.

1 (RISING): If MODE1 is 1, counter 1 advances on a rising edge on MCI2.
TC1MCI2_FE

Counter 1 falling edge mode, channel 2.

0 (A_FALLING_EDGE_ON_MC): A falling edge on MCI2 does not affect counter 1.

1 (FALLING): If MODE1 is 1, counter 1 advances on a falling edge on MCI2.
TC2MCI0_RE

Counter 2 rising edge mode, channel 0.

0 (A_RISING_EDGE_ON_MCI): A rising edge on MCI0 does not affect counter 2.

1 (RISING): If MODE2 is 1, counter 2 advances on a rising edge on MCI0.
TC2MCI0_FE

Counter 2 falling edge mode, channel 0.

0 (A_FALLING_EDGE_ON_MC): A falling edge on MCI0 does not affect counter 2.

1 (FALLING): If MODE2 is 1, counter 2 advances on a falling edge on MCI0.
TC2MCI1_RE

Counter 2 rising edge mode, channel 1.

0 (A_RISING_EDGE_ON_MCI): A rising edge on MCI1 does not affect counter 2.

1 (RISING): If MODE2 is 1, counter 2 advances on a rising edge on MCI1.
TC2MCI1_FE

Counter 2 falling edge mode, channel 1.

0 (A_FALLING_EDGE_ON_MC): A falling edge on MCI1 does not affect counter 2.

1 (FALLING): If MODE2 is 1, counter 2 advances on a falling edge on MCI1.
TC2MCI2_RE

Counter 2 rising edge mode, channel 2.

0 (A_RISING_EDGE_ON_MCI): A rising edge on MCI2 does not affect counter 2.

1 (RISIING): If MODE2 is 1, counter 2 advances on a rising edge on MCI2.
TC2MCI2_FE

Counter 2 falling edge mode, channel 2.

0 (A_FALLING_EDGE_ON_MC): A falling edge on MCI2 does not affect counter 2.

1 (FALLING): If MODE2 is 1, counter 2 advances on a falling edge on MCI2.
RESERVED

Reserved.
CNTR0

Channel 0 counter/timer mode.

0 (CHANNEL_0_IS_IN_TIME): Channel 0 is in timer mode.

1 (CHANNEL_0_IS_IN_COUN): Channel 0 is in counter mode.
CNTR1

Channel 1 counter/timer mode.

0 (CHANNEL_1_IS_IN_TIME): Channel 1 is in timer mode.

1 (CHANNEL_1_IS_IN_COUN): Channel 1 is in counter mode.
CNTR2

Channel 2 counter/timer mode.

0 (CHANNEL_2_IS_IN_TIME): Channel 2 is in timer mode.

1 (CHANNEL_2_IS_IN_COUN): Channel 2 is in counter mode.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data